Semiconductor Packaging | Semiconductor Packaging Device Analysis

Analysis of semiconductor packaging technology

In order to shorten the time to market in semiconductor packaging development, it is critical to have early access to metrology and defect analysis data. We address these challenges through wafer-level and package/die-level workﬂows that support process development. These workﬂows provide development engineers with access to critical dimension data and the identiﬁcation of key defects.

Wafer-level packaging device workﬂows

Back end of line and packaging processes are becoming increasingly complex, and process margins are shrinking. We provide wafer-level metrology and defect analysis workﬂows that can greatly expedite the generation of actionable data early in the packaging integration process and massively improve yields.

Wafer-level packaging device metrology

Semiconductor device packaging metrology workflow

Helios 5 PXL Wafer DualBeam inline SEM metrology workﬂow

Increasing amounts of SEM metrology are needed for measuring components in the horizontal and vertical integration of advanced packaging devices. To capture SEM metrology on sub-surface structures, focused ion beam (FIB) milling is employed, which allows engineers to collect site-speciﬁc critical dimension (CD) variations across wafers.

The Thermo Scientiﬁc Helios 5 PXL PFIB Wafer DualBeam is capable of high-throughput cross-sectional and diagonal milling using a Xe+ plasma ion beam through devices such as through-silicon-vias (TSVs) directly from 300 mm wafers. Additionally, automated metrology data is obtained with our fully integrated metrology workstation. These workﬂows enable high-resolution SEM metrology data directly in the fab, signiﬁcantly accelerating time to data and the feedback cycle.

SEM metrology of semiconductor device packaging

TSV cross-sectional SEM metrology on the Helios 5 PXL Wafer DualBeam.

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Wafer-level packaging device defect analysis using SEM imaging

TSVs are getting more complex and continue to scale down. Micro-bump and hybrid bonding technologies are expected to remain important building blocks for 3D packaging. Consequently, defects are often introduced in R&D and manufacturing processes. Wafer-level inspection is key to continuing innovation. Examples of these defects include misalignment, particle defects, voids, and shorts.

The Thermo Scientiﬁc Helios 5 PXL Wafer DualBeam and Thermo Scientific Helios 5 EXL Wafer DualBeam oﬀer wafer-level defect root cause analysis workﬂows eliminating the need to break the wafer compared to traditional die-level workﬂows. The capabilities of these instruments support you to ramp yield faster and deal with TSV fabrication and wafer stacking challenges.

Large cross sections are cut quickly and accurately to expose the defect for cross-sectional SEM imaging. The high-resolution SEM is then used to analyze and identify the root cause of the defect.

SEM imaging of semiconductor device packaging

Defects exposed including TSV misalignment (left image) and void in micro-bump (right image).

Thermo Scientiﬁc Avizo Software is used to help visualize defects in the device they are contained in. This is achieved by creating a 3D reconstruction of multiple SEM images as the ion beam is milled through the device. This reconstruction can then be used to examine the full volume of the 3D structure, highlighting the defects.

Avizo Software 3D reconstruction of semiconductor device packaging

Avizo Software 3D reconstruction of micro-bump

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Wafer-level packaging device defect analysis using TEM imaging

TEM workflow of semiconductor device packaging analysis

Thermo Scientiﬁc wafer-level TEM defect analysis workﬂow.

We oﬀer wafer-level workﬂow solutions to meet the need for TEM data in new advanced packaging architectures. These solutions encompass sample preparation and imaging and analysis and are speciﬁcally tailored to address the challenges with characterizing defects in advanced packaging such as those revealed in Cu-Cu direct bonding interface analysis.

The Helios 5 EXL Wafer DualBeam system prepares TEM samples of superior quality and volume directly from 300 mm wafers. The instrument incorporates innovative ion beam technology and automation, ensuring sample consistency, repeatability, and a high success rate.

Following sample preparation, the Thermo Scientiﬁc Talos F200E TEM enables the imaging and identiﬁcation of the chemical composition of the defect. The Talos F200E TEM oﬀers the repeatability and speed needed to address this demand for fast-turn TEM data.

By leveraging our comprehensive suite of solutions, advanced packaging engineers can determine defect root cause in complex structures, eﬀectively addressing the challenges to improve yield.

TEM imaging of semiconductor device packaging

Talos F200E TEM Super X EDS image showing chemical composition of voids present in silicon nitride and copper pad interfaces.

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Die-level workﬂows for semiconductor packaging device analysis

Semiconductor advanced packaging and 3D integration has had a profound impact on failure analysis workﬂows throughout the industry. From back-end test and assembly to fabless manufacturing, the ability to rapidly root cause defects in complex 3D volumes is a fundamental requirement. Our Thermo Scientific die-level workﬂows provide industry-standard localization and analysis solutions, delivering precise analytical answers in a very short time.

Die-level fault isolation of semiconductor packaging devices

Today's advanced semiconductor devices rely on high-density, complex packaging integration that results in greater numbers of buried defects. There are many techniques that can provide insights into a defect mechanism and location, but many are time-consuming and often deliver low success rates.

Die-level fault isolation of semiconductor device packaging

We provide solutions to improve the success rate of accurately localizing these defects.

There is one application that is now relied upon for the most eﬃcient and accurate packaging defect localization answers: Lock-In Thermography (LIT) using the Thermo Scientific ELITE System.

The ELITE System features an ultra-high-sensitivity, high-speed InSb camera that can pinpoint defects on die, package, panel, or even in a PCB.

Semiconductor device packaging fault isolation workflow

Through package fault detection.

Electrical to physical failure analysis workflow for advanced packaging dies.

The ELITE System's ability to accurately isolate and characterize subtle faults in x,y, and z enables the subsequent physical root cause analysis to achieve exceptional success rates.

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Die-level defect analysis of semiconductor packaging devices

Physical analysis of defects in advanced semiconductor packages typically involves both SEM and TEM imaging and analysis of features buried in large volumes (nanometer-, micron-, or even millimeter-scale) material. Even more challenging, the variety of materials involved is increasing. In the past, solutions such as Ga+ FIB milling, laser ablation, chemical etching, and polishing could be eﬀectively utilized to expose a defect. But today's packaging defects require a better, more ﬂexible preparation solution to deliver the cut-face quality, site speciﬁcity, and throughput: The Thermo Scientific Helios 5 Hydra DualBeam.

FIB milling plasma FIB ion types used in semiconductor packaging device analysis

Ion species can be selected based on material systems that you encounter.

The Helios 5 Hydra DualBeam includes selectable ion species milling (Xe, Ar, O) and an XHR SEM that can provide high-quality analytical data on the widest range of packaging structures.

The Helios 5 Hydra DualBeam's unique combination of precision, large-volume milling, and the industry-standard Helios platform oﬀers a wide range of application capabilities from large-area SEM cross-section analysis, device deprocessing, and delayering to TEM sample preparation.